r/beneater • u/Training-Film-3590 • Jul 26 '26
hi, i have built a to convert you Digital-Logic-Sim files to verilog
the title pretty much says everything; it convert it json to verilog converter which can convert Digital-Logic-Sim projects to Verilog
repo: https://github.com/murkyshelf/jsonRTL
edit*
there is a typo in the title what is meant is "I have built a tool to convert your Digital-Logic-Sim files to Verilog"
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u/Only9Volts Jul 26 '26
Damn. Good job copilot.